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Pipelining (DSP implementation)
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Pipelining (DSP implementation) : ウィキペディア英語版
Pipelining (DSP implementation)
Pipelining is an important technique used in several applications such as digital signal processing (DSP) systems, microprocessors, etc. It originates from the idea of a water pipe with continuous water sent in without waiting for the water in the pipe to come out. Accordingly, it results in speed enhancement for the critical path in most DSP systems. For example, it can either increase the clock speed or reduce the power consumption at the same speed in a DSP system.
==Concept==
Pipelining allows different functional units of a system to run concurrently. Consider an informal example in the following figure. A system includes three sub-function units (''F''0, ''F''1 and ''F''2). Assume that there are three independent tasks (''T''0, ''T''1 and ''T''2) being performed by these three function units. The time for each function unit to complete a task is the same and will occupy a slot in the schedule.
If we put these three units and tasks in a sequential order, the required time to complete them is five slots.
However, if we pipeline T0 to T2 concurrently, the aggregate time is reduced to three slots.
Therefore, it is possible for an adequate pipelined design to achieve significant enhancement on speed.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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